Designing Network On-Chip Architectures in the Nanoscale Era - - Books - Taylor & Francis Inc - 9781439837108 - December 18, 2010
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Designing Network On-Chip Architectures in the Nanoscale Era 1st edition

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Designing Network On-Chip Architectures in the Nanoscale Era 1st edition

Paving the way for the use of network on-chip architectures in 2015 platforms, this book presents the industrial requirements for such long-term platforms as well as the main research findings for technology-aware architecture design. Each chapter deals with a specific key architecture design, including fault tolerant design.

528 pages, 275 black & white illustrations, 28 black & white tables

Media Books     Hardcover Book   (Book with hard spine and cover)
Released December 18, 2010
ISBN13 9781439837108
Publishers Taylor & Francis Inc
Pages 528
Dimensions 160 × 234 × 39 mm   ·   934 g
Language English  
Editor Bertozzi, Davide
Editor Flich, Jose