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SVA: The Power of Assertions in SystemVerilog 2nd ed. 2015 edition
Eduard Cerny
SVA: The Power of Assertions in SystemVerilog 2nd ed. 2015 edition
Eduard Cerny
This book is a comprehensive guide to assertion-based verification of hardware designs using System Verilog Assertions (SVA). The book makes SVA usable and accessible for hardware designers, verification engineers, formal verification specialists and EDA tool developers.
609 pages, 173 black & white illustrations, 25 black & white tables, biography
Media | Books Hardcover Book (Book with hard spine and cover) |
Released | September 16, 2014 |
ISBN13 | 9783319071381 |
Publishers | Springer International Publishing AG |
Pages | 590 |
Dimensions | 163 × 242 × 38 mm · 1.03 kg |
Language | German |