Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science - Catherine H. Gebotys - Books - Springer - 9780792392231 - October 31, 1991
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Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science 1992 edition

Catherine H. Gebotys

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Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science 1992 edition

Although research in architectural synthesis has been conducted for over ten years it has had very little impact on industry. The OASIC (optimal architectural synthesis with interface constraints) architectural synthesizer and the CATREE (computer aided trees) synthesizer demonstrate how these problems can be solved.

289 pages, biography

Media Books     Hardcover Book   (Book with hard spine and cover)
Released October 31, 1991
ISBN13 9780792392231
Publishers Springer
Pages 289
Dimensions 155 × 235 × 19 mm   ·   607 g
Language English  
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