Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science - Catherine H. Gebotys - Books - Springer-Verlag New York Inc. - 9781461367970 - September 28, 2012
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Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science Softcover reprint of the original 1st ed. 1992 edition

Catherine H. Gebotys

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Optimal VLSI Architectural Synthesis: Area, Performance and Testability - The Springer International Series in Engineering and Computer Science Softcover reprint of the original 1st ed. 1992 edition

Although research in architectural synthesis has been conducted for over ten years it has had very little impact on industry. The OASIC (optimal architectural synthesis with interface constraints) architectural synthesizer and the CATREE (computer aided trees) synthesizer demonstrate how these problems can be solved.


289 pages, black & white illustrations, bibliography

Media Books     Paperback Book   (Book with soft cover and glued back)
Released September 28, 2012
ISBN13 9781461367970
Publishers Springer-Verlag New York Inc.
Pages 289
Dimensions 155 × 235 × 17 mm   ·   435 g
Language English  

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