VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science - J Mermet - Books - Springer - 9780792392538 - May 31, 1992
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VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science 1992 edition

J Mermet

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VHDL for Simulation, Synthesis and Formal Proofs of Hardware - The Springer International Series in Engineering and Computer Science 1992 edition

Presents recent research on four key issues related to the use of VHDL as a standard for hardware description: simulation of circuits using VHDL; the combination of synthesis and VHDL in designing circuits; the formal verification of VHDL designs; and modelling issues and system level design.

307 pages, biography

Media Books     Hardcover Book   (Book with hard spine and cover)
Released May 31, 1992
ISBN13 9780792392538
Publishers Springer
Pages 307
Dimensions 155 × 235 × 19 mm   ·   625 g
Editor Mermet, Jean

See all of J Mermet ( e.g. Hardcover Book )