Test Resource Partitioning for System-on-a-Chip - Frontiers in Electronic Testing - Vikram Iyengar - Books - Springer-Verlag New York Inc. - 9781402071195 - June 30, 2002
In case cover and title do not match, the title is correct

Vikram Iyengar
Test Resource Partitioning for System-on-a-Chip - Frontiers in Electronic Testing 2002 edition

Price
S$ 160
excl. VAT

Ordered from remote warehouse

Expected delivery Dec 17 - 30
Christmas presents can be returned until 31 January

Our customers say:

14-day return policy in accordance with European consumer protection law
Top ranking on Trustpilot
Add to your iMusic wish list

Also available as:

Talks about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. This book aims to position test resource partitioning in the context of SOC test automation. It presents various techniques for the partitioning and optimization of the three major SOC test resources.

232 pages, biography

Media Books     Hardcover Book   (Book with hard spine and cover)
Released June 30, 2002
ISBN13 9781402071195
Publishers Springer-Verlag New York Inc.
Pages 232
Dimensions 155 × 235 × 15 mm   ·   530 g
Language English  

See all of Vikram Iyengar ( e.g. Hardcover Book and Paperback Book )