Formal Semantics and Proof Techniques for Optimizing VHDL Models - Kothanda Umamageswaran - Books - Springer-Verlag New York Inc. - 9781461373315 - October 26, 2012
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Formal Semantics and Proof Techniques for Optimizing VHDL Models Softcover reprint of the original 1st ed. 1999 edition

Kothanda Umamageswaran

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Formal Semantics and Proof Techniques for Optimizing VHDL Models Softcover reprint of the original 1st ed. 1999 edition

a

158 pages, biography

Media Books     Paperback Book   (Book with soft cover and glued back)
Released October 26, 2012
Original release date 1998
ISBN13 9781461373315
Publishers Springer-Verlag New York Inc.
Pages 158
Dimensions 155 × 235 × 9 mm   ·   267 g
Language English  

See all of Kothanda Umamageswaran ( e.g. Hardcover Book and Paperback Book )