Formal Semantics and Proof Techniques for Optimizing VHDL Models - Kothanda Umamageswaran - Books - Springer-Verlag New York Inc. - 9781461373315 - October 26, 2012
In case cover and title do not match, the title is correct

Formal Semantics and Proof Techniques for Optimizing VHDL Models Softcover reprint of the original 1st ed. 1999 edition

Kothanda Umamageswaran

Price
€ 92.49
excl. VAT

Ordered from remote warehouse

Expected delivery Aug 8 - 20

Our customers say:

14-day return policy in accordance with European consumer protection law
Top ranking on Trustpilot
Add to your iMusic wish list

Also available as:

Formal Semantics and Proof Techniques for Optimizing VHDL Models Softcover reprint of the original 1st ed. 1999 edition

a

158 pages, biography

Media Books     Paperback Book   (Book with soft cover and glued back)
Released October 26, 2012
Original release date 1998
ISBN13 9781461373315
Publishers Springer-Verlag New York Inc.
Pages 158
Dimensions 155 × 235 × 9 mm   ·   267 g
Language English  

See all of Kothanda Umamageswaran ( e.g. Hardcover Book and Paperback Book )